Hybrid Stacking Structure Of Electroplated Copper Onto Graphene For Future Interconnect Applications

We show the feasibility of copper electroplating using graphene as a seed layer. Thermal annealing of the as-plated copper-graphene hybrid system promotes permeation of copper into graphene, forming an intermixing layer with enlarged lattice constant. It is shown that this intermixing layer blocks the diffusion of copper into the bottom SiO2/Si substrate at temperatures up to 900 degrees C. The electroplating process is comparable with current semiconductor fabrication technology. This hybrid system can serve as interconnect in the integrated circuits. (C) 2015 AIP Publishing LLC.