A Realistic Method for Time-Dependent Dielectric Breakdown Reliability Analysis for Advanced Technology Node

This paper proposes a methodology to determine a realistic time-dependent dielectric breakdown failure rate. The in-die constant voltage stress was performed to determine the chip level Weibull shape (βdie) and voltage acceleration factor, while a voltage ramp (Vramp) is performed in production line (inline Vramp) to determine the via-to-line and line-to-line spacing distributions. We found that f...