Engineering Barrier and Buffer Layers in InGaAs Quantum-Well MOSFETs

IEEE Transactions on Electron Devices(2012)

引用 5|浏览7
暂无评分
摘要
Properties of InGaAs buried-channel quantum-well MOSFETs affected by the barrier and buffer layers are analyzed by numerical simulations to assist device engineering and optimization. The interplay between the charge-neutrality level position at the barrier/dielectric interface and conduction band discontinuity at the barrier/channel interface is shown to critically impact the achievement of an en...
更多
查看译文
关键词
MOSFETs,Logic gates,Indium gallium arsenide,Indium phosphide,Quantum well devices,Dielectrics,HEMTs
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要