Strain mapping for advanced CMOS technologies: Strain mapping for advanced CMOS technologies

The ability to measure strain quantitatively has become an important tool for characterizing strain-engineered CMOS devices. We report on nanometer scale strain measurements performed on off-the-shelf 32-nm node device structures. We show that the two-dimensional deformation tensor in NMOS channels can be mapped using high resolution transmission electron microscopy. We also demonstrate the application of our recently developed dark-field inline holography technique on an array of PMOS transistors, showing that this technique is capable of combining a large field of view of 1 micrometer with a spatial resolution better than 1 nm, and very high precision (around 10(-4)). Also, the experimental requirements for implementing this technique are easily met on most modern TEMs, without any modification to the hardware or alignment of the microscope.