A Survey and Evaluation of FPGA High-Level Synthesis Tools

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 35, Issue 10, 2016, Pages 1591-1604.

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EvaluationHigh-Level SynthesisSurvey

Abstract:

High-level synthesis (HLS) is increasingly popular for the design of high-performance and energy-efficient heterogeneous systems, shortening time-to-market and addressing today’s system complexity. HLS allows designers to work at a higher-level of abstraction by using a software program to specify the hardware functionality. Additionally,...More

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