Off-State Current and Performance Analysis for Double-Gate CMOS With Non-Self-Aligned Back Gate

Numerical simulation-based study of double-gate (DG) field-effect transistors (FETs) leads to the possibly viable concept of extremely scaled but nonself-aligned DG CMOS. Predictions of off-state current, on-state current, and circuit performance, accounting for short-channel effects and energy-quantization effects, in 25-nm DG FETs suggest that moderate back-gate underlap does not severely underm...