A quad-band GSM/GPRS/EDGE SoC in 65nm CMOS

H Darabi,Poyuan Chang,Henrik T Jensen,A Zolfaghari,John Leete, B Mohammadi,Jenglun Chiu,T Li, Xu Chen,Z Zhou,Morteza Vadipour, C Chen, Yunnan Chang,Ahmad Mirzaei,Amin Alamdar Yazdi,Mohammad Nariman,Aboubacar El Hadji, Paul Anthony Lettieri, Ellis Chang, Bin Zhao,K Juan,Puneet Suri,Chi Guan,L Serrano, J Leung,Jangkyoo Shin,Jaehwan Kim, H Tran,P Kilcoyne,H Vinh, E Raith,M Koscal, A Hukkoo, Claude G Hayek,V Rakhshani, C Wilcoxson,Maryam Rofougaran,Ahmadreza Rofougaran

VLSI Circuits（2010）

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摘要

A quad-band 2.5G SoC integrates all the RF, DSP, ARM, audio and other baseband processing functions into a single 65nm CMOS die. The radio draws a battery current of 49mA in the RX-mode, and 86mA in the GMSK TX-mode. The low-IF receiver achieves a sensitivity of -110dBm at the antenna, corresponding to a noise figure of 2.4dB at the device input. The 8PSK ±400kHz modulation mask is -64.1/62.7dBc for high/low bands, with an RMS EVM of 2.45/1.95%.

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关键词

cmos integrated circuits,antennas,cellular radio,modulation,packet radio networks,system-on-chip,cmos die,antenna,battery current,low-if receiver,modulation mask,quad-band gsm/gprs/edge soc,radio,system on chip,couplings,radio frequency,system on a chip,gsm,noise figure,baseband,low if receiver

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