A novel variation insensitive clock distribution methodology

Circuits and Systems(2010)

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摘要
A new clock distribution technique is introduced in this paper. The technique avoids repeaters completely and distributes the clock directly on the passive interconnect network. The wires can be highly lossy, yet the clock is delivered with a very good shape and eye. The technique uses the characteristics of the interconnect to attenuate all frequency components equally. The resulting clock at the sinks does not depend on supply variations at all and only depends on the LC time constant of the wires. Interestingly, the technique works even better with higher clock frequencies. Signal equalization and boosting at the clock source is applied to further improve the clock shape at the receivers.
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关键词
clock distribution networks,integrated circuit design,passive networks,boosting,clock shape,passive interconnect network,signal equalization,variation insensitive clock distribution methodology
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