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High Performance Extremely Thin Soi (etsoi) Hybrid Cmos with Si Channel Nfet and Strained Sige Channel Pfet

K. Cheng,A. Khakifirooz,N. Loubet,S. Luning,T. Nagumo,M. Vinet,Q. Liu,A. Reznicek,T. Adam,S. Naczas,P. Hashemi,J. Kuss,J. Li,H. He,L. Edge,J. Gimbert,P. Khare,Y. Zhu,Z. Zhu,A. Madan,N. Klymko,S. Holmes,T. M. Levin,A. Hubbard,R. Johnson, M. Terrizzi,S. Teehan,A. Upham,G. Pfeiffer,T. Wu,A. Inada,F. Allibert,B. -Y. Nguyen,L. Grenouillet,Y. Le Tiec,R. Wacquez,W. Kleemeier,R. Sampson,R. H. Dennard,T. H. Ning,M. Khare,G. Shahidi,B. Doris

2012 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)（2012）

Cited 122|Views85
Key words
CMOS integrated circuits,Ge-Si alloys,MOSFET,elemental semiconductors,oscillators,silicon,silicon-on-insulator,STI-last integration scheme,Si,SiGe,channel NFET,finFET,high performance extremely thin SOI,high speed ring oscillator,hybrid channel ETSOI CMOS,modulation device,size 22 nm,strained channel PFET,voltage 0.7 V,voltage 0.9 V
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