An embedded process monitor test chip architecture

Sachin Satish Idgunji,Vikas Chandra,Cezary Pietrzyk,Imran Iqbal,Robert Aitken,Greg Yeric

Microelectronic Test Structures（2010）

引用 8|浏览6

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摘要

We present a test chip architecture which embeds a thorough set of process characterization ring oscillators into a synthesized digital circuit, such as a processor core. We discuss the motivation, implementation, and results from sub-40nm technology silicon.

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关键词

circuit testing,microprocessor chips,oscillators,embedded process monitor test chip architecture,process characterization ring oscillators,processor core,size 40 nm,synthesized digital circuit,design for testability,semiconductor device measurements,semiconductor device testing,yield optimization,logic gates,correlation,production,silicon,data analysis,chip,digital circuits,system on a chip,semiconductor devices,ring oscillator

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