A 0.6 μm Si Bipolar Technology with 17 ps CML Gate Delay and 30 GHz Static Frequency Divider

    The Hague, The Netherlands, 1995, Pages 417-420.

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    noise figurecmos technologysiliconcutoff frequencyproductionMore(1+)

    Abstract:

    A CMOS compatible 0.6 micron silicon bipolar technology with 34 GHz cut-off frequency for mixed digital/analogue applications is presented. CML gate delay of 17 ps, static divider operation of up to 30 GHz and minimum noise figure of 0.8 dB at 2 GHz confirm the wide range of potential circuit applications.

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