A 16b 100-to-160MS/s SiGe BiCMOS pipelined ADC with 100dBFS SFDR

Payne, R.,Corsi, M.,Smith, D.,Kaylor, S.

Solid-State Circuits Conference Digest of Technical Papers（2010）

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摘要

A 16b 160MS/S pipelined ADC built in a complementary SiGe BiCMOS process is presented, with an SFDR of 105dB and an SNR of 77dB at -1dBFS below 160MHz. The fully buffered track-and-hold has circuitry needed to achieve this performance. The internal sub-DAC uses circuits to mitigate the limitations imposed by transistor self-heating, early voltage and impact ionization.

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关键词

BiCMOS integrated circuits,Ge-Si alloys,analogue-digital conversion,SFDR,SiGe,SiGe BiCMOS,buffered track-and-hold,impact ionization,pipelined ADC

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