A 1900MHz-band GSM-based clock-harvesting receiver with −87dBm sensitivity

Radio Frequency Integrated Circuits Symposium（2011）

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摘要

A 0.13μm CMOS clock-harvesting receiver is presented which extracts a 21Hz clock embedded within the GSM standard for the wake-up of a wireless sensor network. In active mode, the receiver achieves -87dBm sensitivity with 57μs of jitter at the output while consuming 126μW. The receiver is optimized for heavy duty-cycling with a sleep-mode power consumption of only 81pW.

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关键词

cmos integrated circuits,cellular radio,radio receivers,wireless sensor networks,cmos clock-harvesting receiver,gsm standard,frequency 21 hz,heavy duty-cycling,jitter,power 81 pw,size 0.13 mum,sleep-mode power consumption,time 57 mus,wireless sensor network,analog integrated circuits,gsm,clock-harvesting receiver,wake-up receiver,sensitivity,band pass filters,indexing terms,duty cycle,computer architecture

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