A robust reliability methodology for accurately predicting Bias Temperature Instability induced circuit performance degradation in HKMG CMOS
Reliability Physics Symposium, 2011, Pages CR.1.1-CR.1.4.
A robust reliability characterization / modeling approach for accurately predicting Bias Temperature Instability (BTI) induced circuit performance degradation in High-k Metal Gate (HKMG) CMOS is presented. A series of device level stress experiments employing both AC and DC stress/relax BTI measurements are undertaken to characterize FET'...More
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