Cycling induced degradation of a 65nm FPGA flash memory switch

Integrated Reliability Workshop Final Report(2010)

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摘要
We present a study of cycling induced degradation of a two transistor Flash memory cell with a shared floating gate. The cell directly serves as a configurable interconnection switch in a Field Programmable Gate Array (FPGA) fabricated with a 65 nm embedded-Flash process. By optimizing the poly re-oxidation, LDD implant and spacer module, the cell endurance is significantly improved at both the single cell and 1 Mbit test-array levels.
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关键词
field programmable gate arrays,flash memories,integrated circuit interconnections,oxidation,semiconductor switches,fpga flash memory switch,ldd implant,cell endurance,configurable interconnection switch,cycling induced degradation,embedded-flash process,field programmable gate array,poly re-oxidation,shared floating gate,spacer module,test-array levels,transistor flash memory cell,nonvolatile memory,switches,programming,degradation,logic gates
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