An age-aware library for reliability simulation of digital ICs

Mehdi Katoozi,Ethan H Cannon,Tuan Dao,K Aitken, Shannon Fischer,Tony Amort, Roger Brees, J Tostenrude

Reliability Physics Symposium（2013）

引用 5|浏览5

暂无评分

摘要

A general method for creating an age-aware library of cells, including the impact of multiple reliability degradation mechanisms, is presented. The underlying degradation models take into account key reliability-impacting parameters such as input slew rate, output load, signal toggle rate, signal activity factor, output buffer size and age. A framework for using this age-aware library to analyze the aging of digital Integrated Circuit (IC) timing performance using existing Electronic Design Automation (EDA) methodologies is also discussed.

查看译文

关键词

circuit simulation,digital integrated circuits,electronic design automation,integrated circuit design,integrated circuit reliability,eda,age-aware library,digital ic,digital integrated circuit,electronic design automation methodology,input slew rate parameter,multiple reliability degradation mechanism,output buffer size parameter,output load parameter,reliability simulation,reliability-impacting parameter,signal activity factor parameter,signal toggle rate parameter,timing performance,hci,nbti,tddb,age-aware,cell library,degradation models,reliability,static timing analysis,data models,aging,logic gates

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要