Foreground digital calibration of non-linear errors in pipelined A/D converters

Circuits and Systems(2010)

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摘要
A foreground digital calibration technique for pipelined ADC is proposed which accounts for linear error correction, while an error estimation technique for amplifier non-linearity is suggested as a reference for non-linear error correction. The calibration algorithm is based on applying a slow input to the ADC to automatically correct for linear errors, while depending on the accuracy of Digital Error Correction (DEC) to estimate and correct for non-linear errors. The proposed calibration scheme is demonstrated for an 11 bit pipelined ADC, and gives SNDR improvement over 30 dB, while using low specifications residue amplifier to reduce power consumption.
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关键词
amplifiers,analogue-digital conversion,calibration,error correction,nonlinear estimation,amplifier nonlinearity estimation,digital error correction,error estimation technique,foreground digital calibration technique,linear error correction,low specification residue amplifier,nonlinear error correction,pipelined A/D converters,pipelined ADC,power consumption reduction,word length 11 bit
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