A 1-V 84-Db Dr 1-Mhz Bandwidth Cascade 3-1 Delta-Sigma Adc In 65-Nm Cmos

Athens（2009）

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摘要

This paper presents a switched-capacitor E analog-to-digital converter, achieving a dynamic range of 84 dB and a bandwidth of 1 MHz for a power consumption of 17 mW. A cascade 3-1 topology allows aggressive noise-shaping without imposing too stringent specifications on the amplifiers. The design is implemented in a 1 V, 65 nm standard CMOS technology. The use of a novel symmetrical bootstrapped switch solves the non-linearity issues of low-voltage transmission gates. The higher flicker noise of nanoscale CMOS technologies is reduced by applying chopping to the first amplifier input pair.

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关键词

cmos integrated circuits,amplifiers,bootstrap circuits,cascade networks,choppers (circuits),delta-sigma modulation,network topology,aggressive noise-shaping,amplifier input pair chopping,bandwidth 1 mhz,cascade topology,delta-sigma adc,flicker noise,low-voltage transmission gates,nanoscale cmos technology,nonlinearity,power 17 mw,size 65 nm,symmetrical bootstrapped switch,voltage 1 v,switched capacitor,switches,logic gates,gain,signal to noise ratio,low voltage,dynamic range,delta sigma adc,transistors,delta sigma modulation,noise shaping

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