Implementation of a level 1 trigger system using high speed serial (VXS) techniques for the 12GeV high luminosity experimental programs at Thomas Jefferson National Accelerator Facility

Beijing(2009)

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摘要
We will demonstrate a hardware and firmware solution for a complete fully pipelined multi-crate trigger system that takes advantage of the elegant high speed VXS serial extensions for VME. This trigger system includes three sections starting with the front end crate trigger processor (CTP), a global Sub-System Processor (SSP) and a Trigger Supervisor that manages the timing, synchronization and front end event readout. Within a front end crate, trigger information is gathered from each 16 Channel, 12 bit Flash ADC module at 4 nS intervals via the VXS backplane, to a Crate Trigger Processor (CTP). Each Crate Trigger Processor receives these 500 MB/S VXS links from the 16 FADC-250 modules, aligns skewed data inherent of Aurora protocol, and performs real time crate level trigger algorithms. The algorithm results are encoded using a Reed-Solomon technique and transmission of this Level 1 trigger data is sent to the SSP using a multi-fiber link. The multi-fiber link achieves an aggregate trigger data transfer rate to the global trigger at 8 Gb/s. The SSP receives and decodes Reed-Solomon error correcting transmission from each crate, aligns the data, and performs the global level trigger algorithms. The entire trigger system is synchronous and operates at 250 MHz with the Trigger Supervisor managing not only the front end event readout, but also the distribution of the critical timing clocks, synchronization signals, and the global trigger signals to each front end readout crate. These signals are distributed to the front end crates on a separate fiber link and each crate is synchronized using a unique encoding scheme to guarantee that each front end crate is synchronous with a fixed latency, independent of the distance between each crate. The overall trigger signal latency is <3 uS, and the proposed 12GeV experiments at Jefferson Lab require up to 200KHz Level 1 trigger rate.
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关键词
reed-solomon codes,high energy physics instrumentation computing,readout electronics,satellite computers,signalling protocols,synchronisation,trigger circuits,12bit flash adc module,aurora protocol,jefferson lab,reed-solomon error correcting transmission,reed-solomon technique,thomas jefferson national accelerator facility,algorithm,critical timing clocks,electron volt energy 12 gev,frequency 250 mhz,front end crate trigger processor,front end event readout,global sub-system processor,global trigger signals,high speed serial techniques,level 1 trigger system,luminosity experimental programs,multifiber link,pipelined multicrate trigger system,synchronization,synchronization signals,trigger supervisor,reed solomon,transceivers,optical switches,data transfer,protocols,front end,error correction,decoding,jitter,microprogramming,backplanes,real time,optical fibers,hardware,clock synchronization
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