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Efficient Temporal Blocking for Stencil Computations by Multicore-Aware Wavefront Parallelization

Computer Software and Applications Conference, 2009. COMPSAC '09. 33rd Annual IEEE International, (2009): 579-586

Cited by: 119|Views121
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Abstract

We present a pipelined wavefront parallelization approach for stencil-based computations. Within a fixed spatial domain successive wavefronts are executed by threads scheduled to a multicore processor chip with a shared outer level cache. By re-using data from cache in the successive wavefronts this multicore-aware parallelization strateg...More

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