Optimization of control gate material and structure for enhancing 20nm 64Gb NAND flash reliability

H S Kim,K J Lee,K H Han,S W Cho,S K Choi, S W Seo,J H Chung,S J Chung,Keum Hwan Noh,Tae Un Youn,J Y Lee,M K Lee, Byeong Il Han,Su Min Yi,H S Lee,S S Kim,Wan Sup Shin, Kwang Hyun Yun, M S Ko,J K Choi,S W Lee, Myung Kyu Ahn,K S Kim,Young Ho Jeon,Seiichi Aritome,J W Kim, K O Ahn, S J Hong, G H Bae,Sung Wook Park

VLSI Technology, Systems, and Applications（2012）

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摘要

We developed the new control gate (CG) material and structure in order to overcome scaling limitation beyond 20nm NAND flash cell. New CG material can achieve excellent gap-fill without void and improvement of the Gate CD Gap (GCG). And also, by using new CG material, CG depletion between floating gate (FG) can be improved. As a result, gate coupling ratio, bit-line (BL) interference and tail-cell Vt distribution are drastically improved. These technologies play an important role in the characteristic of scaled NAND flash memory cell and reliability.

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关键词

nand circuits,flash memories,logic gates,nand flash memory cell,nand flash reliability,bit-line interference,control gate material optimization,floating gate,gate coupling ratio,scaling limitation,logic gate,scaling limit,interference,nonvolatile memory,reliability,couplings,materials

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