Hardware/software co-design approach for a DCT-based watermarking algorithm

The rapid increase in the distribution of digital multimedia data over networks creates the need for copyright protection. Watermarking is one of the techniques that can be used for this copyright protection. Many authors have proposed pure software or hardware solutions for the implementation of watermarking algorithms. In this paper we propose a hardware/software co-design approach for the implementation of the watermarking algorithm. Processes that demand high performance are implemented in hardware while those that are not computationally expensive are implemented in software. As a result, power consumption is reduced since only portion of the algorithm is implemented in hardware. In this paper we implement a DCT-based visible watermarking algorithm. Our system is implemented on a Xilinx Virtex-II Pro board. 21% of the slices were utilized with a maximum frequency of 131.092 MHz.