Combined C-V/I-V front-end-of-line measurement

Stas Polonsky,Simeon Realov,Jiunhsin Liao,M J Hargrove, M B Ketchen

Microelectronic Test Structures（2012）

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摘要

We present a simple test structure to measure C-V and I-V curves of the same nominal size FET. The structure is simple enough to be used for technology development, requires only first metal for routing, and allows parallel test. It is an extension of FEOL QVCM technique, reported at this conference in 2011, and uses dc current measurement for C-V extraction with atto-Farad resolution. The utility of the presented technique is illustrated with 22 nm SOI device characterization.

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关键词

electric current measurement,elemental semiconductors,field effect transistors,semiconductor device testing,silicon,silicon-on-insulator,c-v extraction,c-v-i-v front-end-of-line measurement,dc current measurement,feol qvcm technique,soi device characterization,si,atto-farad resolution,metal,nominal-size fet,parallel test,routing,size 22 nm,technology development,test structure,front end,silicon on insulator

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