Placement of shorting vias for power integrity in multi-layered structures

San Jose, CA(2008)

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摘要
The effect of the number of the shorting vias on the power integrity of multi-layered structures has been demonstrated in this paper. Following that, an empirical design rule for the fewest number of the shorting vias is proposed to maintain the original power integrity and reduce the cost at the same time. For validation, the design concept is also realized in a real package structure at last.
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关键词
electronics packaging,interconnections,printed circuits,empirical design rule,multilayered packages,multilayered structures,package structure,power integrity,printed circuit boards,design rules,resonant frequency,equivalent circuits,capacitance,impedance,inductance
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