Characterization of a three-dimensional SOI integrated-circuit technology

C K Chen,Nisha Checka,Brian Tyrrell, P W Wyatt,D R W Yost,J M Knecht, J Kedzierski,Craig L Keast

New Paltz, NY（2008）

引用 5|浏览13

暂无评分

摘要

This paper describe the process and test results after single tier circuit fabrication as well as after three-tier integration, determine impact of 3D vias on ring oscillator performance, and demonstrate functionality of single and multi-tier circuits of varying complexity.

查看译文

关键词

integrated circuit design,integrated circuit metallisation,integrated circuit technology,integrated circuit testing,monolithic integrated circuits,oscillators,silicon-on-insulator,3d soi integrated-circuit technology,si,integrated circuit test,interconnect-metal layers,monolithically integrated 3d circuits,ring oscillator,tier circuit fabrication,metals,radio frequency,three dimensional,fabrication,integrated circuit,silicon on insulator,transistors

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要