A Highly Reliable FRAM (Ferroelectric Random Access Memory)

J H Kim,D J Jung,Y M Kang,H H Kim, W W Jung, J Y Kang,E S Lee,J Y Jung, S K Kang,Yeon Ki Hong,So Yeon Kim, H K Koh,D Y Choi, J H Park,S Y Lee,H S Jeong, Keunsoo Kim

Phoenix, AZ（2007）

引用 6|浏览46

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摘要

64 Mb FRAM with 1T1C (one-transistor and one-capacitor) cell architecture has progressed greatly for a robust level of reliability. Random-single-bits appeared from package-level tests are attributed mostly to extrinsic origins (e.g. interconnection failures) rather than intrinsic ones. The extrinsic failures can be linked to two activation energies: while one is 0.27 eV originated from oxygen-vacancy movements at the top interface and grain boundary in the ferroelectric films, the other is 0.86 eV caused by imperfection in either the top-electrode contact (TEC), or the bottom-electrode contact (BEC), or both, of the cell capacitor. As a result of applying novel schemes to remove the analyzed defectives, we have the FRAM with no bit failure up to 1000 hours over both high-temperature-operating-life (HTOL) and high-temperature-storage (HTS) tests

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关键词

electrical contacts,ferroelectric storage,ferroelectric thin films,grain boundaries,memory architecture,random-access storage,0.27 ev,0.86 ev,64 mbit,activation energies,bottom-electrode contact,cell capacitor,ferroelectric films,ferroelectric random access memory,grain boundary,high-temperature-operating-life,high-temperature-storage tests,one-transistor and one-capacitor cell architecture,oxygen-vacancy movements,package-level tests,random-single-bits,reliable fram,top-electrode contact,robustness,nonvolatile memory,packaging,testing,capacitors,failure analysis,ferroelectric materials

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