A Leakage Current Replica Keeper for Dynamic Circuits
Solid-State Circuits, IEEE Journal of（2007）
摘要
We present a leakage current replica (LCR) keeper for dynamic domino gates that uses an analog current mirror to replicate the leakage current of a dynamic gate pull-down stack and thus tracks process, voltage, and temperature. The proposed keeper has an overhead of one field-effect transistor per gate plus a portion of a shared current mirror. Techniques for properly sizing LCR keepers are presented. Using these sizings, LCR keepers allow design of and-or circuits with 30% more legs than conventional keepers at the same noise margin in a 90-nm, 1.2-V CMOS logic process. Furthermore, 16-24-leg dynamic AO circuits are 25%-40% faster when using the replica keeper. We demonstrated the circuit operation on a 1024 words times 72 bits, 3W/4R embedded SRAM macro using a four-stage LCR-keeper domino structure for a read-out circuit
更多查看译文
关键词
process variation,cmos process,90 nm,and circuits,keeper,current mirrors,leakage currents,gate pull-down stack,or circuits,sram chips,register file,readout electronics,cmos logic circuits,dynamic gates,dynamic logic,precharged logic,cmos logic process,pvt tracking,domino gates,field effect transistors,1.2 v,leakage,sram,leakage current replica keeper,3-write 4-read sram,analog current mirror,logic gates,readout circuit,and-or circuits,leakage current
AI 理解论文
溯源树
样例
生成溯源树，研究论文发展脉络
Chat Paper
正在生成论文摘要