Noise analysis of ESD structures and impacts on a fully-integrated 5.5 GHz LNA in 0.18/spl mu/m SiGe BiCMOS

Guang Chen,Haigang Feng,Albert Wang,Yuhua Cheng

Paris（2005）

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摘要

ESD-induced parasitics are critical to RF ICs. This paper reports the first quantitative study of noises of ESD protection structures and their influences on RF ICs. Noise figures (NF) of typical ESD structures were characterized and their impact on a single-chip 5.5 GHz LNA circuit was investigated. The design was implemented in a 0.18mum SiGe BiCMOS. Measurement shows substantial degradation in NF of LNA due to ESD noises and a practical selection criterion in designing RF IC with ESD structures is provided

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关键词

bicmos integrated circuits,ge-si alloys,electrostatic discharge,microwave integrated circuits,semiconductor materials,5.5 ghz,esd protection structures,esd-induced parasitics,sige,electrostatic discharge protection design,noise analysis,noise figures,noise figure,chip

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