Analysis and modeling of substrate impedance network in RF CMOS

Emmanuel Bouhana,P Scheer,S Boret,Daniel Gloria,Gilles Dambrine,Michel Minondo,Herve Jaouen

ieee（2006）

引用 5|浏览7

暂无评分

摘要

This paper presents a new approach for analyzing and modeling the substrate impedance network in RF CMOS. Thanks to preliminary and proper de-embedding of known parasitics, the substrate network is directly identified. Using this approach on MOS transistors from 130 down to 65 nm technologies allows to point out the respective implications of the isolation layer and the surrounding well plug on high-frequency characteristics. Their impacts are studied and a new model is proposed.

查看译文

关键词

cmos integrated circuits,mosfet,microwave integrated circuits,semiconductor device models,130 nm,65 nm,mos transistors,rf cmos,isolation layer,substrate impedance network,intelligent networks,impedance,radio frequency,high frequency,cmos technology,semiconductor device modeling,capacitance

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要