The effect of LUT and cluster size on deep-submicron FPGA performance and density

    IEEE Transactions on Very Large Scale Integration Systems, Volume 12, Issue 3, 2004, Pages 288-298.

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    Keywords:
    VLSIfield programmable gate arraysflip-flopsintegrated logic circuitslogic CADMore(16+)

    Abstract:

    In this paper, we revisit the field-programmable gate-array (FPGA) architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cluster-based island-style FPGAs (Betz et al. 1997) we look at the effect of lookup table (LUT) size and cluster size (number of L...More

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