A programmable hardware accelerator for compiled electrical simulation

This paper describes a high performance hardware accelerator for electrical simulation, with a speedup of over 500 for a uniprocessor. The processor addresses a variety of problems ranging from timing simulation to circuit simulation. The accelerator combines special purpose units, such as a high speed device evaluator, with fully programmable general purpose processors. The specialized processors offer extremely high speed for performance critical parts of the simulation. The general purpose processors are optimized for compiled electrical simulation, and use a very long instruction word I(VLIW) architecture. The network solution is compiled into VLIW code. This paper concentrates on those features of the machine that are designed for circuit simulation algorithms, such as SPICE. A simplified example is used to expose the hardware and software techniques used to attack the problem, and estimate the performance improvement due to each technique.