A 10b 100kS/s SAR ADC with charge recycling switching method

Kai-Hsiang Chiang,Soon-Jyh Chang,Guan-Ying Huang,Ying-Zu Lin

A-SSCC（2014）

引用 4|浏览11

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摘要

This paper presents a low-voltage and energy-efficient 10b SAR ADC which manipulates charge recycling switching method for saving the switching energy. In additional, a window-based reconfigurable comparator is used to achieve fast comparison and small power dissipation. The proposed 10b SAR ADC operates at 100kS/s with 0.4V supply voltage in 90nm CMOS. The measurement results show that the prototype ADC achieve 55.37dB SNDR at Nyquist rate with only 107nW. The Figure-of-Merit (FoM) is 2.23fJ/conv.-step.

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关键词

cmos digital integrated circuits,nyquist criterion,analogue-digital conversion,comparators (circuits),switching convertors,cmos,fom,nyquist rate,sar adc,charge recycling switching method,figure-of-merit,power 107 nw,power dissipation,size 90 nm,switching energy,voltage 0.4 v,window-based reconfigurable comparator,cmos integrated circuits,linearity,switches,signal to noise ratio,recycling,capacitors

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