Segr In Sio2-Si3n4 Stacks
Nuclear Science, IEEE Transactions (2013)
摘要
This work presents experimental Single Event Gate Rupture (SEGR) data for Metal Insulator Semiconductor (MIS) devices, where the gate dielectrics are made of stacked SiO2-Si3N4 structures. A semi-empirical model for predicting the critical gate voltage in these structures under heavy-ion exposure is first proposed. Then interrelationship between SEGR cross-section and heavy-ion induced energy deposition probability in thin dielectric layers is discussed. Qualitively, a connection between the energy deposition in the dielectric and the SEGR is shown.
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关键词
SEGR,semi-empirical,MOS,SiO2,Si3N4,modeling
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