Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced

Although near-threshold (Vth) operation is an attractive method for energy and performance-constrained applications, it suffers from problems in terms of circuit stability, particularly, for static random access memory (SRAM) cells. This brief proposes a near-Vth 9T SRAM cell implemented in a 22-nm FinFET technology. The read buffer of the proposed cell ensures read stability by decoupling the stored node from the read bit-line and improves read performance using a one-transistor read path. Energy and standby power are reduced by eliminating the sub-Vth leakage current in the read buffer. For accurate sensing yield estimation, a new yield-estimation method is also proposed, which considers the dynamic trip voltage. The proposed SRAM cell can achieve a minimum operating voltage of 0.3 V.