A 1.92-GS/s CT ΔΣ modulator with 70-db DR and 78-db SFDR in 15-MHz bandwidth

NEWCAS(2014)

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摘要
This paper describes the implementation and measurement results of a 1.92 GS/s continuous-time (CT) low-pass ΔΣmodulator for a high frequency (>10 GHz) multifunctional receiver. The proposed single-loop 3rd-order modulator operates at 1.92 GHz, taking advantage of the high transit frequency (fT) of a low-cost 0.25 μm SiGe BiCMOS process. In order to achieve high linearity, single-bit quantization is employed, which is inherently linear and no digital DAC linearity enhancement technique is required. The experimental prototype chip achieves a dynamic range of 70 dB and a spurious-free dynamic range (SFDR) of 78.1 dB for a signal bandwidth of 15 MHz. It dissipates 220 mW and occupies 0.4 mm2 silicon area.
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关键词
cmos integrated circuits,digital-analogue conversion,modulators,quantisation (signal),receivers,bicmos process,ct δς modulator,sfdr,sige,bandwidth 15 mhz,continuous-time low-pass δς modulator,frequency 1.92 ghz,high linearity single-bit quantization,multifunctional receiver,power 220 mw,single-loop 3rd-order modulator,spurious-free dynamic range,linearity,jitter,spurious free dynamic range,noise,bandwidth,modulation
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