An integrated development environment for reconfigurable operators array

Yong Shanshan,Wang Xin'An, Cao Ying,Lu Yawei,Xie Zheng

Proceedings of International Conference on ASIC（2013）

引用 3|浏览18

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摘要

In this paper, an integrated development environment (IDE), which is used to map application into a target reconfigurable operators (ReOps) array, is presented. Having as input APU RTL description of an application, the IDE produces the configuration bitstream. The proposed IDE supports a variety of ReOps array through revising the architecture file which including the definition of ReOps, interconnection segments and connection switches, as well as the scale of array and organization of ReOps. A set of benchmarks is given to verify the flow of proposed IDE. © 2013 IEEE.

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关键词

field programmable gate arrays,reconfigurable architectures,FPGA,IDE,ReOps array,architecture file,connection switches,input APU RTL description,integrated development environment,interconnection segments,reconfigurable operator array

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