A 4.78 mm 2 Fully-Integrated Neuromodulation SoC Combining 64 Acquisition Channels With Digital Compression and Simultaneous Dual Stimulation
J. Solid-State Circuits(2015)
摘要
A 65 nm CMOS 4.78 mm 2 integrated neuromodulation SoC consumes 348 μA from an unregulated 1.2 V to 1.8 V supply while operating 64 acquisition channels with epoch compression at an average firing rate of 50 Hz and engaging two stimulators with a pulse width of 250 μs/phase, differential current of 150 μA, and a pulse frequency of 100 Hz. Compared to the state of the art, this represents the lowest area and power for the highest integration complexity achieved to date.
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关键词
analog,compression,electrodes,capacitance,neurophysiology,data acquisition,digital compression,noise,system on chip,adiabatic,gain,cmos integrated circuits,brain machine interface,biomedical,stimulation,capacitors
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