Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells.

IEEE Transactions on Circuits and Systems II: Express Briefs(2014)

引用 0|浏览18
暂无评分
摘要
This brief presents an implementation of ultralow-power microcontrollers that use a separate clock network voltage (SCNV) to correct unexpected errors produced by on-chip variations (OCVs). Separating the clock network voltage requires amendments in the standard cell library and physical designs. Here, the experiments used a 65-nm technology that exhibited considerable OCVs, which caused write and...
更多
查看译文
关键词
Clocks,Voltage measurement,Reduced instruction set computing,Error analysis,Latches,Delays
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要