An LP/CBP reconfigurable analog baseband circuit for software-defined radio receivers in 65 nm CMOS.

A low pass (LP) and complex band pass (CBP) reconfigurable analog baseband circuit for software-defined radio (SDR) receivers is presented. It achieves 1–15MHz LP bandwidth, 2–8MHz CBP bandwidth and 0–36dB gain range with 1dB step. Nulling-resistor Miller feed-forward (NRMFF) differential-mode compensation, passive left half-plane (LHP) zero common-mode compensation and Quasi-Floating Gate (QFG) technique are proposed to improve the high frequency performance and driving capability of the embedded fully differential operational amplifier (Op-Amp). The analog baseband circuit has been implemented in 65nm CMOS. It achieves 15.2dBm/27.1dBm IB/OB-IIP3, −2dBm IP1dB and 71dBm IIP2 while consuming 3.6–9.1mW from a 1.2V power supply and 0.75mm2 chip area.