Procrustes: Power Constrained Performance Improvement Using Extended Maximize-then-Swap Algorithm

This paper proposes an efficient algorithm that maximizes performance under power constraints and is applicable in the general context of traditional dynamic voltage/frequency scaling, or core heterogeneity and emerging dynamic microarchitectural adaptation. Performance maximization in these scenarios can be essentially viewed as mapping application threads to appropriate core states that have various power/performance characteristics. Such problems are formulated as a generic 0- 1 integer linear program (ILP). The proposed algorithm is an iterative heuristic-based solution. Compared with an optimal solution generated by commercial ILP solver, the proposed algorithm produces results less than 1% away from optimum on average, with more than two orders of magnitude improvement in runtime. The algorithm can be brought online for hundredcore heterogeneous systems as it scales to systems comprised of 256 cores with less than one millisecond in overhead in worst cases. The intrinsic history awareness also provides flexibility to control cost induced by switching voltage/frequency pairs, migrating threads across cores or tuning on/off micro-architectural resources.