Thermal-aware floorplanning for partially-reconfigurable FPGA-based systems
DATE, pp. 920-923, 2015.
integrated circuit packaginglinear programmingintegrated circuit layoutmathematical modelthermal resistanceMore(6+)
Field Programmable Gate Arrays (FPGAs) systems are being more and more frequent in high performance applications. Temperature affects both reliability and performance, therefore its optimization has become challenging for system designers. In this work we present a novel thermal aware floorplanner based on both Simulated Annealing (SA) an...More
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