Modeling and optimization of low power resonant clock mesh
ASP-DAC, pp. 478-483, 2015.
clock networkmatlabpower consumptionlc tank locationintegrated circuit modellingMore(24+)
Power consumption is becoming more critical in modern integrated circuit (IC) designs and clock network is one of the major contributors for on-chip power. Resonant clock has been investigated as a potential solution to reduce the power consumption in clock network by recycling the energy with on-chip inductors. Most of the previous reson...More
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