Low-Cost Low-Power Uhf Rfid Tag With On-Chip Antenna

This paper presents an EPC Class 1 Generation 2 compatible tag with on -chip antenna implemented in the SMIC 0.18 pm standard CMOS process. The UHF tag chip includes an RF/analog front-end, a digital base band, and a 640-bit EEPROM memory. The on-chip antenna is optimized based on a novel parasitic-aware model. The rectifier is optimized to achieve a power conversion efficiency up to 40% by applying a self-bias feedback and threshold compensation techniques. A good match between the tag circuits and the on-chip antenna is realized by adjusting the rectifier input impedance. Measurements show that the presented tag can achieve a communication range of 1 cm with 1 W reader output power using a 1 x 1 cm(2) single-turn loop reader antenna.