A Novel Capacitor-Less 2-T Soi Dram Cell

The capacitor in conventional 1T/1C DRAM cell accounts for large area and can hardly be realized by SOI technology. This cell can operate in low voltage, but needs super shallow junction, which is difficult to realize in process and not suitable for scaling down. In this work, a novel capacitor- less two-transistor (2-T) SOI DRAM cell is proposed for the first time.