Real-time image processing system using FPGA with hardware software collaborative processing

In order to overcome the problem that image processing systems based on PC is weak in real-time processing, and systems based on DSP and FPGA cost a lot and inadequate use of resources, a design of real-time image processing system using FPGA with hardware software collaborative processing is proposed. The system uses an FPGA chip as the core of the system, a CCD camera to do image acquisition, and SSRAM to cache the image. SOPC is the control of the core, coordinating hardware and software to processing image. Image processing modules which are easy to use hardware implementation (such as filtering, morphological algorithm, image correction, edge detection, etc.) use the Verilog HDL language to implement. The SOPC is used to control these image processing modules. The image processing functions whose hardware is difficult to achieve (such as process control, complex branching to determine) use the SOPC. The experiment shows the high speed and real-time of the image processing system, and the ability on computation of complex image algorithms. Moreover, it is simple in design, flexible in application and low in cost.