Characterization Of Hynix 16m Feram Adopted Novel Sensing Scheme

16M FeRAM was successfully developed using a (Bi1-XLaX) 4 Ti-3 O-12 , BLT, film with excellent imprint characteristic as a ferroelectric film to decrease capacitor size, current gain cell operation (CGCO) sensing scheme, and split word line (SWL) cell array architecture with hierarchical-double bit line in order to increase cell array efficiency. The chip size of 16M FeRAM could be reduced down to about 63% compared with a conventional one by the adoption of the novel ferroelectric material and the design architectures. The read/write access time and cycle time are 70 ns and 100 ns in operation voltage of 3.0 at room temperature, respectively. The operation and standby current are less than 20 mA and 10 muA, respectively.