A Digital-Pll-Based True Random Number Generator
2005 PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS, VOLS 1 AND 2, PROCEEDINGS（2005）
摘要
A true random number generator (RNG) based on a digital phase-locked loop (PLL) has been designed and implemented in a 1.5um CMOS process. It achieved an output data rate of 100 kbps from the sampling of two 30MHz ring oscillators, and successfully passed the NIST test suite SP800-22.
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关键词
frequency,noise measurement,phase locked loops,phase noise,random number generation,true random number generator,white noise,jitter,integrated circuit design,ring oscillator
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