A Low-Power Gigabit CMOS Limiting Amplifier Using Negative Impedance Compensation and Its Application
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 393-399, 2012.
cmos analogue integrated circuitsnegative impedance compensation techniqueoptical receiver chiplow-power operation40-db gainMore(49+)
This paper presents a low-power, gigabit limiting amplifier (LA) for application to optical receivers that employ the negative impedance compensation technique not only to enhance the gain and bandwidth characteristics simultaneously, but also to allow low-voltage, low-power operations. Test chips of the LA were implemented in a standard ...More
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