High-performance lattice QCD for multi-core based parallel systems using a cache-friendly hybrid threaded-MPI approach

SC(2011)

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摘要
Lattice Quantum Chromo-dynamics (LQCD) is a computationally challenging problem that solves the discretized Dirac equation in the presence of an SU(3) gauge field. Its key operation is a matrix-vector product, known as the Dslash operator. We have developed a novel multicore architecture-friendly implementation of the Wilson-Dslash operator which delivers 75 Gflops (single-precision) on an Intel® Xeon® Processor X5680 achieving 60% computational efficiency for datasets that fit in the last-level cache. For datasets larger than the last-level cache, this performance drops to 50 Gflops. Our performance is 2-3X higher than a well-known implementation from the Chroma software suite when running on the same hardware platform. The novel implementation of LQCD reported in this paper is based on recently published the 3.5D spatial and 4.5D temporal tiling schemes. Both blocking schemes significantly reduce LQCD external memory bandwidth requirements, delivering a more compute-bound implementation. The performance advantage of our schemes will become more significant as the gap between compute flops and external memory bandwidth continues to grow. We demonstrate very good cluster-level scalability of our implementation: for a lattice of 323 x 256 sites, we achieve over 4 Tflops when strong-scaled to a 128 node system (1536 cores total). For the same lattice size, a full Conjugate Gradients Wilson-Dslash operator, achieves 2.95 Tflops.
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关键词
last-level cache,high-performance lattice qcd,external memory bandwidth,well-known implementation,parallel system,novel multicore architecture-friendly implementation,cache-friendly hybrid threaded-mpi approach,performance advantage,wilson-dslash operator,novel implementation,compute-bound implementation,lqcd external memory bandwidth,dslash operator,conjugate gradient,lattice qcd,gauge field,computer architecture,scheduling,quantum computing,lattices,bandwidth,external memory,dirac equation,vectors,memory management,message passing,parallel processing,kernel,parallel systems,multicore processing
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