Design-Dependent Process Monitoring for Wafer Manufacturing and Test Cost Reduction

ICCAD(2012)

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摘要
Short-loop process monitoring structures (usually simple device I-V, C-V measurements made after M1 fabrication) are commonly put in wafer scribelines. These test structures are almost always design independent and measured or monitored by the foundry to keep track of process deviations. We propose a design-dependent process monitoring strategy that can accurately predict design performance based ...
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关键词
Semiconductor device measurement,Monitoring,Capacitance,Manufacturing,Current measurement,Delay estimation
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